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基于SIP技術(shù)的固態(tài)硬盤電路設(shè)計(jì)
電子技術(shù)應(yīng)用
楊楚瑋,張梅娟,沈慶
中國電子科技集團(tuán)公司第五十八研究所, 江蘇 無錫 214035
摘要: 存儲(chǔ)系統(tǒng)小型化、高性能需求與日俱增,為此設(shè)計(jì)了一款基于SiP技術(shù)的固態(tài)硬盤電路,用于驗(yàn)證存儲(chǔ)系統(tǒng)SiP電路的可行性。該SiP電路內(nèi)部以SSD控制模塊為核心處理單元,集成了用于數(shù)據(jù)存儲(chǔ)的NAND顆粒、用于固件存儲(chǔ)的SPI Flash以及電源管理等元器件。在搭建的軟硬件平臺上進(jìn)行底層ATA指令驗(yàn)證以及與傳統(tǒng)分離式存儲(chǔ)系統(tǒng)的對比性能測試,證明了應(yīng)用SiP技術(shù)的存儲(chǔ)系統(tǒng)具備高性能、小型化、低功耗等諸多優(yōu)勢,為后續(xù)SiP存儲(chǔ)系統(tǒng)的設(shè)計(jì)和驗(yàn)證奠定了一定的技術(shù)基礎(chǔ)。
中圖分類號:TN401 文獻(xiàn)標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.234276
中文引用格式: 楊楚瑋,張梅娟,沈慶. 基于SIP技術(shù)的固態(tài)硬盤電路設(shè)計(jì)[J]. 電子技術(shù)應(yīng)用,2024,50(3):36-41.
英文引用格式: Yang Chuwei,Zhang Meijuan,Shen Qing. The designation of solid state drive circuit based on SiP technology[J]. Application of Electronic Technique,2024,50(3):36-41.
The designation of solid state drive circuit based on SiP technology
Yang Chuwei,Zhang Meijuan,Shen Qing
The 58th Research Institute, CETC , Wuxi 214035 , China
Abstract: The demand for miniaturization and high performance of storage system is increasing day by day. Therefore, this paper designs a solid state drive circuit based on system in package(SiP) technology to verify the feasibility of SiP circuit of storage system. The SiP circuit uses SSD controller module as the core processing unit, integrating NAND for data storage, SPI Flash for firmware storage and power management. The verification of ATA instructions on the hardware and software platform and the performance test compared with the traditional separated storage system prove that the storage system with SiP technology has many advantages, such as high performance, miniaturization and low power, which lays a certain technical foundation for the design and verification of SiP storage system.
Key words : system in package (SiP);storage system;SSD controller module;miniaturization

引言

隨著固態(tài)硬盤(Solid State Disk, SSD)小型化、高性能、高穩(wěn)定性的要求越來越高,在確保安全穩(wěn)定的前提下,提高集成度有利于存儲(chǔ)系統(tǒng)體積的縮小和功耗的降低。然而,傳統(tǒng)SSD設(shè)計(jì)采用分離式設(shè)計(jì)方式,在PCB板級上多個(gè)芯片進(jìn)行組合,各類元器件使得PCB板卡面積龐大,且存在較嚴(yán)重的功耗和散熱問題[1-3]。


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http://ihrv.cn/resource/share/2000005913


作者信息:

楊楚瑋,張梅娟,沈慶

中國電子科技集團(tuán)公司第五十八研究所


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