應用于導航SoC的專用DMA的設(shè)計
2021年電子技術(shù)應用第3期
秦 爽1,2,李 健1,楊 穎1,陳 杰1
1.中國科學院微電子研究所,北京100029;2.中國科學院大學,北京100049
摘要: 衛(wèi)星導航技術(shù)以及社會的快速發(fā)展使得高精度定位的需求越來越大。隨著導航系統(tǒng)和頻點的增加,導航模塊中需要處理的數(shù)據(jù)量越來越大。通用DMA(Direct Memory Access)控制器無法完成大量通道的傳輸,采用中央處理器(CPU)傳輸需要占用CPU大量的時間。應用于導航片上系統(tǒng)(SoC)的專用DMA支持全系統(tǒng)全頻點的導航通道的數(shù)據(jù)搬移,經(jīng)過測試驗證,DMA搬移相同通道數(shù)的數(shù)據(jù)所需要的時鐘周期為CPU的三分之一,有效提高了CPU的效率。在設(shè)計中采用了低功耗優(yōu)化技術(shù),優(yōu)化后DMA模塊動態(tài)功耗降低至原來的15%。
中圖分類號: TN492
文獻標識碼: A
DOI:10.16157/j.issn.0258-7998.200909
中文引用格式: 秦爽,李健,楊穎,等. 應用于導航SoC的專用DMA的設(shè)計[J].電子技術(shù)應用,2021,47(3):27-30.
英文引用格式: Qin Shuang,Li Jian,Yang Ying,et al. Design of dedicated DMA applied to navigation SoC[J]. Application of Electronic Technique,2021,47(3):27-30.
文獻標識碼: A
DOI:10.16157/j.issn.0258-7998.200909
中文引用格式: 秦爽,李健,楊穎,等. 應用于導航SoC的專用DMA的設(shè)計[J].電子技術(shù)應用,2021,47(3):27-30.
英文引用格式: Qin Shuang,Li Jian,Yang Ying,et al. Design of dedicated DMA applied to navigation SoC[J]. Application of Electronic Technique,2021,47(3):27-30.
Design of dedicated DMA applied to navigation SoC
Qin Shuang1,2,Li Jian1,Yang Ying1,Chen Jie1
1.Institute of Microelectronics of the Chinese Academy of Sciences,Beijing 100029,China; 2.University of Chinese Academy of Sciences,Beijing 100049,China
Abstract: The rapid development of satellite navigation technology and society has made the demand for high-precision positioning increasingly large. With the increase of navigation systems and frequency points, the amount of data that needs to be processed in the navigation module is increasing. The general DMA(Direct Memory Access)controller cannot complete the transmission of a large number of channels, and the transmission using the CPU requires a lot of CPU time. The dedicated DMA applied to the navigation system on chip(SoC) supports the data movement of the navigation channel of the whole system and the whole frequency point. After testing and verification, the clock cycle required by the DMA to move the same channel number of data is one-third of the CPU One, effectively improving the efficiency of the CPU. Low-power optimization technology is used in the design, after optimization, the dynamic power consumption of the DMA module is reduced to 15% of the original.
Key words : navigation;SoC;DMA
0 引言
隨著社會的發(fā)展,衛(wèi)星導航已經(jīng)廣泛應用到人類社會的很多方面,如無人機、物聯(lián)網(wǎng)、車輛導航以及物流等[1],對導航定位的精度要求也越來越高。目前的導航SoC主要采用CPU來完成導航模塊的數(shù)據(jù)搬移工作,隨著導航系統(tǒng)和頻點的增加,搬移大量導航通道的數(shù)據(jù)將占用CPU大量的時間。而且CPU頻繁地輪詢檢測各個通道的狀態(tài)將使CPU的低功耗設(shè)計變得極為復雜。梁科等人設(shè)計了一款通用DMA,該DMA能有效提高數(shù)據(jù)傳輸效率,但是它最多支持8個通道,無法滿足導航應用要求[2]。張路煜等人設(shè)計的DMA使用了專用數(shù)據(jù)通路,雖然避開了AHB總線,能進行多路并行傳輸,但是會使SoC內(nèi)部時序復雜[3]。本文設(shè)計了一種專用于導航SoC的DMA,它能高效的完成大量通道的數(shù)據(jù)搬移[4-11]。
本文詳細內(nèi)容請下載:http://ihrv.cn/resource/share/2000003414
作者信息:
秦 爽1,2,李 健1,楊 穎1,陳 杰1
(1.中國科學院微電子研究所,北京100029;2.中國科學院大學,北京100049)
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