中圖分類號(hào)： TN47
文獻(xiàn)標(biāo)識(shí)碼： A
DOI：10.16157/j.issn.0258-7998.209806
中文引用格式： 郝強(qiáng). 基于硬件仿真器的PCIe接口驗(yàn)證方法的研究和實(shí)現(xiàn)[J].電子技術(shù)應(yīng)用，2020，46(8)：77-79.
英文引用格式： Hao Qiang. Research and implementation of verification method for PCIe interface based on emulator[J]. Application of Electronic Technique，2020，46(8)：77-79.

Research and implementation of verification method for PCIe interface based on emulator

Abstract： The PCIe interface is a kind of high-speed interface widely used on system on chip(SoC). In the register transfer level(RTL) design and development stage of the SoC, it is particularly important to verify the design of the PCIe interface. Different verification platforms are needed to ensure the functional correctness and performance stability of the design. This paper focuses on the method of PCIe interface verification platform based on Cadence emulator, and realizes the verification method with a chip. The practice shows that this method can quickly build the verification platform, provide high emulation performance, support a variety of debugging methods, and effectively complete the verification objectives.

Key words : emulation；PCIe；integrated circuit verification