Avnet公司的ADI電源模塊是采用ADI公司的ADP1850 器件,專為Xilinx 公司的7系列FPGA提供電源,12V電壓輸入,四個(gè)雙路ADP1850器件提供8路穩(wěn)壓輸出:3.3V/8A,2.5V/8A,2.0V/2A,1.8V/6A,1.5V或1.35V/4A,1.2V/4A和兩路1.0V/6A.輸出誤差在3%或5%.本文介紹了ADI電源模塊主要指標(biāo)和特性,方框圖,電路圖,材料清單和PCB布局圖.

The Analog Devices Power Module provides a proven robust design for powering Xilinx 7 series devices. Designed to meet the tolerance and sequencing guidelines set forth by Xilinx, the Analog Devices Power Module provides a highly optimized controller based design utilizing the ADP1850 dual output synchronous buck controller. The device operates in current mode for improved transient response and uses valley current sensing for enhanced noise immunity. The ADP1850 is ideal in system applications requiring multiple output voltages: the ADP1850 includes a synchronization feature to eliminate beat frequencies between switching devices; provides accurate tracking capability between supplies and includes precision enable for simple, robust sequencing. The ADP1850 provides high speed, high peak current drive capability with dead-time optimization to enable energy efficient power conversion. For low load operation, the device can be configured to operate in power saving mode (PSM) by skipping pulses and reducing switching losses to improve the energy efficiency at light load and standby conditions.

Additional flexibility is provided by external programmability of loop compensation, soft start, frequency setting, power saving mode, current limit and current sense gain can all be programmed using external components.


圖1.ADI電源模塊外形圖

ADI電源模塊主要指標(biāo):


ADI電源模塊主要特性:

12 V input

Eight regulated outputs (4 dual output ADP1850 devices)

3.3 V @ 8 A output, 5% tolerance

2.5 V @ 8 A output, 5% tolerance

2.0 V @ 2 A output, 3% tolerance

1.8 V @ 6 A output, 5% tolerance

1.5 V/1.35 V @ 4 A jumper selectable output, 5% tolerance

1.2 V @ 4 A output, 2.5% tolerance

1.0 V @ 6 A output, 3% tolerance

Second 1.0 V @ 6 A output, 3% tolerance

Remote sense for greater regulation accuracy at the load on all outputs

Meets recommended start up sequencing for Xilinx 7 series devices

Vccint -> Vccaux -> Vccaux_io -> Vcco

圖2.ADI電源模塊框圖

圖3.ADI電源模塊電路圖(1)

圖4.ADI電源模塊電路圖(2)

圖5.ADI電源模塊電路圖(3)

圖6.ADI電源模塊電路圖(4)

圖7.ADI電源模塊電路圖(4)
ADI電源模塊材料清單(BOM)見(jiàn):

圖8.ADI電源模塊PCB布局圖(頂層)


圖9.ADI電源模塊PCB布局圖(底層)
詳情請(qǐng)見(jiàn):
http://www.analog.com/static/imported-files/data_sheets/ADP1850.pdf
和
https://www.em.avnet.com/Support%20And%20Downloads/ADI%20Power%20Module%20User%20Guide_release%2001.pdf
以及
https://www.em.avnet.com/Support%20And%20Downloads/ADI%20Power%20Module%20Schematic%20R02.pdf