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5 nm MSOA RapidPDK及物理實(shí)現(xiàn)
2021年電子技術(shù)應(yīng)用第8期
賀愷華1,丁學(xué)偉1,2
1.深圳市中興微電子技術(shù)有限公司IP設(shè)計(jì)部,廣東 深圳518055; 2.移動(dòng)網(wǎng)絡(luò)和移動(dòng)多媒體技術(shù)國家重點(diǎn)實(shí)驗(yàn)室,廣東 深圳518055
摘要: 隨著當(dāng)今電子行業(yè)的發(fā)展,對(duì)SoC芯片,尤其是數(shù)?;旌闲酒囊笤絹碓礁摺:蛡鹘y(tǒng)的DEF/GDS數(shù)據(jù)交互方式相比,Mixed Signal Open Database(MSOA) RapidPDK可以幫助設(shè)計(jì)人員通過相同的PDK更好地完成數(shù)字工具Innovus和模擬工具Virtuoso之間的數(shù)據(jù)傳遞。首先描述了5 nm MSOA RapidPDK生成方式,其次使用生成的PDK實(shí)現(xiàn)5 nm IP物理實(shí)現(xiàn),同時(shí)驗(yàn)證MSOA flow對(duì)5 nm設(shè)計(jì)在版圖完成和交付方面的速率提升。
中圖分類號(hào): TN402
文獻(xiàn)標(biāo)識(shí)碼: A
DOI:10.16157/j.issn.0258-7998.219805
中文引用格式: 賀愷華,丁學(xué)偉. 5 nm MSOA RapidPDK及物理實(shí)現(xiàn)[J].電子技術(shù)應(yīng)用,2021,47(8):59-63,67.
英文引用格式: He Kaihua,Ding Xuewei. 5 nm physical implementation with MSOA RapidPDK[J]. Application of Electronic Technique,2021,47(8):59-63,67.
5 nm physical implementation with MSOA RapidPDK
He Kaihua1,Ding Xuewei1,2
1.IP Design Department of Sanechips Technology Co.,Ltd.,Shenzhen 518055,China; 2.State Key Laboratory of Mobile Network and Mobile Multimedia Technology,Shenzhen 518055,China
Abstract: Success in today′s electronics market place,most SoCs currently being developed have analog or mixed signal blocks, many so-called analog blocks actually have digital-control logic.Virtuoso-innovus flow with MSOA RapidPDK allows for all or parts of the physical hierarchy to pass back and forth between Virtuoso and Innovus easily without having to generate a DEF/GDS file. In this paper, we firstly describe the way to generate 5 nm RapidPDK, then use this PDK with digital flow to finish 5 nm IP design with custom lib. Additionally, this Virtuoso-innovus flow provides our analog designers with advanced techniques for 5 nm floorplanning, pin optimization, track generation and auto place & routing with RC extraction and timing analysis aware which will simplify the flow to enable virtuoso users to run 5 nm layout implementation, and also could help us to do full chip STA analysis
Key words : MSOA RapidPDK;5 nm;Virtuoso;Innovus

0 引言

    隨著芯片工藝的發(fā)展,數(shù)?;旌闲酒械臄?shù)字和模擬模塊(Block)已經(jīng)沒有明顯的區(qū)分界限,很多情況下,模擬模塊的內(nèi)部會(huì)包含數(shù)字模塊,隨之而來的問題是需要大量時(shí)間和精力解決在數(shù)字和模擬模塊之間數(shù)據(jù)交互的問題和彼此database的兼容性。同時(shí)先進(jìn)工藝下隨著double pattern等特性的引入,模擬版圖的實(shí)現(xiàn)變得更加復(fù)雜,而如何提高效率,保證數(shù)據(jù)準(zhǔn)確性也變得更加重要。



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作者信息:

賀愷華1,丁學(xué)偉1,2

(1.深圳市中興微電子技術(shù)有限公司IP設(shè)計(jì)部,廣東 深圳518055;

2.移動(dòng)網(wǎng)絡(luò)和移動(dòng)多媒體技術(shù)國家重點(diǎn)實(shí)驗(yàn)室,廣東 深圳518055)




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