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StellamarXilinxXC3S400AN數(shù)字ADC音頻評(píng)估方案

2012-03-08
作者:Stellamar 公司

Stellamar 公司的數(shù)字ADC采用Xilinx公司的 XC3S400AN FPGA,平均功耗低50%,面積低50%,非常低的工作電壓,高達(dá)14位的有效位,14位500Hz的SNR為90dB,數(shù)字典輸出,數(shù)字測(cè)試,過(guò)采樣,不會(huì)丟失碼,極低的失調(diào)漂移,能用在苛刻的環(huán)境.目標(biāo)應(yīng)用在語(yǔ)音,消費(fèi)類(lèi)和工業(yè)中的傳感器,低功率手提設(shè)備以及軍事,空間和航空航天.本文介紹了數(shù)字ADC主要特性,數(shù)字ADC音頻評(píng)估板框架圖,電路圖和材料清單.
 
The Digital ADC is a digital core which provides analog functionality with all the benefits of a digital design process: shorter design cycles, lower risk, established design and layout tools, digital test methodology, and portability across process technologies.

The design is implemented with a small number of digital gates and only an LVDS input cell, a digital output cell and a handful of passive external components

The ADC provides up to 12 effective bits and up to 15 kHz of bandwidth making it ideal fit for both low frequency sensors and high-quality voice.

The benefits of the digital implementation include low voltage and low power process technologies where it excels in portable applications.

Alternative digital process technologies enable the Digital ADC to be used in high reliability and radiation hard environments where analog implementations are problematic.

數(shù)字ADC主要特性:

? On average 50% less power1

? On average 68% smaller area1

? Very low supply voltages

? Up to 14 effective bits

? Bandwidth

o 14 bits, 500 Hz with SNR 90 dB

o 12 bits, 4 kHz with SNR 72 dB

o 12 bits, 15 kHz with SNR 68 dB

? Process Technology Independent

? Digital Layout

? Digital Testing

? Oversampling

? No missing codes

? Extremely low offset drift

? Suitable for Rad-Hard environments

數(shù)字ADC目標(biāo)應(yīng)用:

? Voice

? Sensors (Consumer and Industrial)

? Low Power portable

? Military, Space and Avionics

數(shù)字ADC音頻評(píng)估板

Digital ADC Audio Evaluation Board

The Stellamar Digital ADC audio evaluation board provides a platform that contains two separate implementations of the Digital ADC targeted at audio applications. The ADC implementation is selected by switch 1 in SW1.

0) 11-bit ADC with a 5 kHz bandwidth. This ADC may be used for voice signals where higher frequency signals are not required, enabling a smaller digital design.

1) 10-bit ADC with a 20 kHz bandwidth. This ADC provides a higher bandwidth that is suitable for musical signals, but has a larger digital design.


圖1.數(shù)字ADC音頻評(píng)估板外形圖


圖2.數(shù)字ADC音頻評(píng)估板方框圖

圖3.數(shù)字ADC音頻評(píng)估板電路圖(1)

圖4.數(shù)字ADC音頻評(píng)估板電路圖(2)
數(shù)字ADC音頻評(píng)估板材料清單:

詳情請(qǐng)見(jiàn):
http://www.stellamar.com/docs/Audio_EVB_User_Guide.pdf



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