《電子技術(shù)應(yīng)用》
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一種可調(diào)延時(shí)超窄脈沖觸發(fā)序列產(chǎn)生技術(shù)
電子技術(shù)應(yīng)用
姚鼎一1,2,景寧1,2,張敏娟1,2,余甜2
1.中北大學(xué) 信息與通信工程學(xué)院, 山西 太原 030051;2.中北大學(xué) 前沿交叉科學(xué)研究院, 山西 太原 030051
摘要: 為了實(shí)現(xiàn)高頻信號(hào)在欠采樣條件下的波形重構(gòu),遞進(jìn)延時(shí)超窄觸發(fā)信號(hào)的產(chǎn)生成為順序等效采樣技術(shù)用于觸發(fā)取樣系統(tǒng)進(jìn)行高頻信號(hào)采樣的關(guān)鍵。為此,設(shè)計(jì)了一種可編程延時(shí)觸發(fā)序列產(chǎn)生及調(diào)理電路,在FPGA數(shù)字電路的控制下,通過計(jì)數(shù)器與延時(shí)模塊產(chǎn)生可調(diào)延時(shí)觸發(fā)序列,利用階躍恢復(fù)二極管特性對(duì)產(chǎn)生的觸發(fā)序列進(jìn)行調(diào)理,產(chǎn)生一種延時(shí)步進(jìn)可調(diào)、邊沿極窄的脈沖信號(hào)。通過對(duì)該電路進(jìn)行測(cè)試,結(jié)果表明,輸出脈沖信號(hào)步進(jìn)范圍0~-2.4 ns可調(diào),分辨率可達(dá)1 ps,且邊沿跳變時(shí)間可以達(dá)到120 ps內(nèi),幅度可達(dá)到8 V左右。該延遲脈沖和調(diào)理電路可應(yīng)用于通信、雷達(dá)等信號(hào)探測(cè)設(shè)備中,對(duì)于高頻信號(hào)的獲取與分析具有重要意義。
中圖分類號(hào):TN78 文獻(xiàn)標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.234163
中文引用格式: 姚鼎一,景寧,張敏娟,等. 一種可調(diào)延時(shí)超窄脈沖觸發(fā)序列產(chǎn)生技術(shù)[J]. 電子技術(shù)應(yīng)用,2024,50(1):50-54.
英文引用格式: Yao Dingyi,Jing Ning,Zhang Minjuan,et al. An adjustable delay time ultra-narrow pulse trigger sequence generation technique[J]. Application of Electronic Technique,2024,50(1):50-54.
An adjustable delay time ultra-narrow pulse trigger sequence generation technique
Yao Dingyi1,2,Jing Ning1,2,Zhang Minjuan1,2,Yu Tian2
1.School of Information and Communication Engineering,North University of China, Taiyuan 030051, China; 2.Research Institute of Frontier Interdisciplinary Sciences, North University of China, Taiyuan 030051, China
Abstract: In order to realize the waveform reconstruction of high-frequency signals under under-sampling conditions, the generation of progressive delay ultra-narrow trigger signals has become the key to the use of sequential equivalent sampling techniques for high-frequency signal sampling in trigger sampling systems. To this end, a programmable delay trigger sequence generation and conditioning circuit is designed. Under the control of the FPGA digital circuit, an adjustable delay trigger sequence is generated through the counter and delay module, and the step recovery diode characteristic is utilized to condition the generated trigger sequence to produce a pulse signal with adjustable delay step and extremely narrow edge. By testing the circuit, the results show that the output pulse signal step range is adjustable between 0~2.4 ns, the resolution can be up to 1 ps, the edge jump time can reach within 120 ps, and the amplitude is about 8 V. The delayed pulse and conditioning circuit can be applied to communications, radar and other signal detection equipment, and has great significance for the acquisition and analysis of high-frequency signals.
Key words : adjustable delay time;narrow pulse;step recovery diode

引言

近年來,對(duì)更高數(shù)據(jù)率和更可靠通信系統(tǒng)的需求推動(dòng)了高頻信號(hào)的發(fā)展,使用傳統(tǒng)的奈奎斯特定理對(duì)高頻信號(hào)進(jìn)行采樣已經(jīng)受到極大的限制,如5G無線通信系統(tǒng),其工作頻率高達(dá)50 GHz,對(duì)其進(jìn)行實(shí)時(shí)采樣需要高達(dá)100 GS/s[1-2]。目前,國(guó)內(nèi)對(duì)于ADC采樣率的研究最高可達(dá)20 GS/s,對(duì)于獲取10 GHz以上高頻信號(hào),只能依賴于國(guó)外高速采集模塊,且高速ADC一般僅有6~8 bit,轉(zhuǎn)換位數(shù)變低,采樣精細(xì)度也隨之降低,而等效采樣作為前沿技術(shù),可以在信號(hào)的不同周期進(jìn)行順序采樣,極大地降低了對(duì)采樣率的要求,且可以實(shí)現(xiàn)14 bit及以上垂直分辨率[3],提高了采樣精細(xì)度。對(duì)信號(hào)進(jìn)行等效采樣,關(guān)鍵在于被測(cè)高頻信號(hào)周期極短,需要一種極窄脈沖信號(hào)作為本振信號(hào)在ps級(jí)時(shí)間內(nèi)觸發(fā)信號(hào)。故產(chǎn)生一種延時(shí)步進(jìn)可調(diào)、邊沿極窄的脈沖信號(hào)是進(jìn)行等效采樣、重構(gòu)波形的關(guān)鍵技術(shù)。


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作者信息:

姚鼎一1,2,景寧1,2,張敏娟1,2,余甜2

(1.中北大學(xué) 信息與通信工程學(xué)院, 山西 太原 030051;2.中北大學(xué) 前沿交叉科學(xué)研究院, 山西 太原 030051)


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