采用SSI協(xié)議實現(xiàn)的通信控制器設計
電子技術應用
張暉,楊兆峰,張鑫剛,王琦,薛培
無錫華普微電子有限公司
摘要: 提出一種部署在FPGA器件的SSI通信方法,應用在數(shù)據(jù)傳輸領域。SSI通信控制器采用高頻時鐘同步邊沿檢測原理對輸入時鐘信號進行采樣,實現(xiàn)數(shù)據(jù)接收時通信速率的自動兼容功能。通過測量10 Mb/s通信速率時硬件接口時序參數(shù),驗證控制器IP功能正常且信號質量良好,采用仿真測試分析控制器IP讀、寫操作時有效通信帶寬都達到設定通信帶寬的99.9%以上,驗證控制器性能能夠滿足通信接口需求。
中圖分類號:TN914 文獻標志碼:A DOI: 10.16157/j.issn.0258-7998.245379
中文引用格式: 張暉,楊兆峰,張鑫剛,等. 采用SSI協(xié)議實現(xiàn)的通信控制器設計[J]. 電子技術應用,2024,50(10):93-97.
英文引用格式: Zhang Hui,Yang Zhaofeng,Zhang Xingang,et al. Design of communication controller implemented by SSI protocol[J]. Application of Electronic Technique,2024,50(10):93-97.
中文引用格式: 張暉,楊兆峰,張鑫剛,等. 采用SSI協(xié)議實現(xiàn)的通信控制器設計[J]. 電子技術應用,2024,50(10):93-97.
英文引用格式: Zhang Hui,Yang Zhaofeng,Zhang Xingang,et al. Design of communication controller implemented by SSI protocol[J]. Application of Electronic Technique,2024,50(10):93-97.
Design of communication controller implemented by SSI protocol
Zhang Hui,Yang Zhaofeng,Zhang Xingang,Wang Qi,Xue Pei
Wuxi Hope Microelectronics Co., Ltd.
Abstract: This paper proposes an SSI communication method deployed on FPGA devices for application in the field of data transmission. The SSI communication controller adopts the principle of high-frequency clock synchronization edge detection to sample the input clock signal, achieving automatic compatibility of communication rate during data reception. By measuring the hardware interface timing parameters at a communication rate of 10 Mb/s, it was verified that the controller IP function is normal and the signal quality is good. Simulation testing was used to analyze that the effective communication bandwidth of the controller IP during read and write operations reaches over 99.9% of the set communication bandwidth, verifying that the controller performance can meet the communication interface requirements.
Key words : SSI;communication controller;signal edge detect;FPGA
引言
同步串行接口協(xié)議(Synchronous Serial Interface,SSI) 具有引腳消耗量少,通信距離長且不依賴芯片高速物理層支持等特點,廣泛用于數(shù)據(jù)傳輸領域。
目前基于SSI協(xié)議已取得一些研究成果。普遍采用兩線制SSI,相對于三線制同步串行通信機制,兩線制取消了幀同步信號,使用數(shù)據(jù)幀頭作為一幀數(shù)據(jù)有效指示,使引腳占用率降低33.33%。2020年姚若辰等[1]、張李偉[2],2016年王青等[3]分別提出了兩線制SSI,都采用時鐘信號的有無來判斷一幀數(shù)據(jù)起始,但未有通信容錯機制設計。2018年李文濤等[4]、2012年靳紅濤等[5]分別提出了可實現(xiàn)配置4種固定通信速率切換設計,但無法適應傳輸系統(tǒng)通信速率自動兼容功能需求。
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作者信息:
張暉,楊兆峰,張鑫剛,王琦,薛培
(無錫華普微電子有限公司,江蘇 無錫 214035)
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