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一种片外电容交叉充放电型振荡电路设计
电子技术应用 2023年3期
曹杨,曹振吉,曹靓,赵桂林
(中国电子科技集团公司第五十八研究所,江苏 无锡 214035)
摘要: CMOS环形振荡器具有版图面积小、调谐范围大、电路简单便于集成等优点,广泛应用于各类电源系统及电子通信应用中。在常规的环形振荡电路基础上,设计了独立的充放电控制通路,实现了一种交叉充放电型环形振荡电路,并通过外接片外电容的方式,得到更低频率的振荡周期。基于0.18 μm工艺,采用HSIM工具对电路进行功能仿真,经过后端物理实现后,版图面积为172 μm×76 μm,对电路进行提参后仿,结果表明:在3.3 V电压及25 ℃条件下,外接10 nF接地电容时,电路获得约1.2 ms的稳定振荡周期。在Vcc=2.7 V~5.5 V、T=-55 ℃~125 ℃条件下,时钟周期的最大偏移为5.83%。该电路已成功应用于某电源控制芯片中。
中圖分類號:TN432 文獻(xiàn)標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.223029
中文引用格式: 曹楊,曹振吉,曹靚,等. 一種片外電容交叉充放電型振蕩電路設(shè)計[J]. 電子技術(shù)應(yīng)用,2023,49(3):77-81.
英文引用格式: Cao Yang,Cao Zhenji,Cao Liang,et al. An oscillator circuit with cross charge and discharge by off-chip capacitors[J]. Application of Electronic Technique,2023,49(3):77-81.
An oscillator circuit with cross charge and discharge by off-chip capacitors
Cao Yang,Cao Zhenji,Cao Liang,Zhao Guilin
(The 58th Research Institute, China Electronics Technology Group Corp., Wuxi 214035, China)
Abstract: CMOS Ring Oscillator has many advantages such as small layout area, large frequency range and easy integration. It is widely used in the DC-DC buck converter and electronic communication systems. On the basis of the traditional ring oscillator circuit, an independent charge and discharge control path is designed to realize a cross charge and discharge ring oscillator circuit, and a lower frequency oscillation period is obtained by externally connecting an off-chip capacitor. Based on 0.18 μm process, the circuit has been simulated with HSIM tool. After the back-end physical implementation, the layout of the oscillation occupies an area of 172 μm×76 μm. Using tools to extract parasitic parameters from the layout and conduct post-simulation, the simulation results indicates that with externally connecting an off-chip capacitor, and the power supply voltage in 3.3 V and temperature in 25℃, the oscillator has a clock period of 1.2 ms. With the power supply voltage changes in 2.7 V~5.5 V and temperature changes in -55℃~125℃, the frequency deviation is 5.83%.The circuit has been successfully applied in a power management chip.
Key words : ring oscillator;charge and discharge of capacitor;power management chip;clock

0 引言

壓控振蕩器(Voltage Controlled Oscillator, VCO)作為時鐘產(chǎn)生電路,作為各類通信系統(tǒng)的核心組成部分,被廣泛應(yīng)用于鎖相環(huán)(Phase Locked Loop, PLL)、高速時鐘、數(shù)模轉(zhuǎn)換器(Analog-to-Digital Converter, ADC)等多個領(lǐng)域。當(dāng)前主流的壓控振蕩器分為LC振蕩器和環(huán)形振蕩器。LC振蕩器通常由片上電容、電感和有源器件構(gòu)成,品質(zhì)因素較高,顯示出良好的相位噪聲特性,然而,調(diào)諧范圍有限、片上電感面積較大、與CMOS工藝兼容困難等問題也成為LC振蕩器的關(guān)鍵性缺陷。相比之下,環(huán)形振蕩器具有調(diào)諧范圍大、支持多相位輸出、占用面積小、電路簡單便于集成、成本低等優(yōu)點,在CMOS工藝、片上系統(tǒng)的快速發(fā)展下,成為一種很有吸引力的選擇并被廣泛應(yīng)用。

環(huán)形振蕩器是由多個延遲單元串聯(lián)形成的閉合環(huán)路,其噪聲抑制能力較差、受電源電壓影響較大,導(dǎo)致產(chǎn)生的振蕩周期并不穩(wěn)定,并不適用于設(shè)計高性能環(huán)形振蕩器。因此,本文提出一種具有獨立的充放電通路、頻率可調(diào)的振蕩電路結(jié)構(gòu),分別由兩個不同的電容交叉充放電形成穩(wěn)定的振蕩頻率,同時,通過外接納法級電容,突破集成片內(nèi)電容約皮法級的大小限制,得到低于1 MHz的較低頻率振蕩周期。




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作者信息:

曹楊,曹振吉,曹靚,趙桂林

(中國電子科技集團(tuán)公司第五十八研究所,江蘇 無錫 214035)


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