Lattice公司的MN34041視頻攝像頭采用Panasonic公司的MN34041PL 1/3吋 CMOS數(shù)字圖像傳感器，支持1080p分辨率，具有210萬(wàn)象素，12位和60fps的全HD分辨率，10位和120fps的全掃描分辨率，1,580 G/LSB的高靈敏度，是HDR-60視頻攝像機(jī)的部件，工作電壓3.3V, AVDD, 1.8V和1.2V，從HDR-60基板5V中產(chǎn)生。本文介紹了MN34041 NanoVesta攝像頭主要特性和詳細(xì)電路圖。
The Lattice HDR-60 Video Camera Development Kit is a fully production ready High Dynamic Range (HDR) camera, designed to fit into commercially available camera housings. The hardware is designed to support full 1080p resolution at 60 frames per second in streaming mode through the FPGA, without the need for any external frame buffer. The integrated ‘IONOS’ Image Signal Processing (ISP) IP pipeline from Lattice partner, Helion GmbH, provides end-to-end ISP support from sensor to displayable image, and incorporates sensor interfacing, defective pixel correction & 2D noise reduction, high quality 5 x 5 DeBayer, Color Correction Matrix, Fast Auto Exposure, Auto White Balance, HDR, Gamma Correction and Overlay (both character and graphics). Lattice HDMI PHY IP enables output to HDMI/DVI monitors. The kit provides the industry’s fastest Auto-Exposure, very high quality Auto White Balance and HDR greater than 120dB. On board Broadcom Broadreach™ PHY enables support for Ethernet over coax up to a run length of 700 meters. The hardware supports up to 16-megapixel sensors, can support up to 2 sensors simultaneously and is easily programmable via standard low-cost USB cable.
The Kit consists of two boards, the long HDR-60 Base Board and the square Nanovesta Sensor Board mounted on top of the Base Board. The base board is populated with a Lattice ECP3-70, while the sensor board is equipped with an Aptina 720p High Dynamic Range (HDR) sensor. The hardware, however, is designed to support full 1080p resolution at 60 frames per second. The Kit incorporates a plug-n-play demo that runs right out of the box at 60fps when connected to a HDMI or DVI monitor. Designed to jump-start the design efforts of camera manufacturers planning to take advantage of the high-performance, low-power digital signal processing capabilities of Lattice FPGAs, the demo bitstream, board schematics and Gerber files are available free of charge to all purchasers of the Kit. While the Kit is populated with a Lattice ECP3-70 in order to provide ample space for camera manufacturers to integrate their own IP, the entire ‘IONOS’ HDR Image Signal Processing (ISP) pipeline is capable of fitting into a Lattice ECP3-35 device. This, coupled with the facts that the ISP pipeline needs no external frame buffer and the low power consumption of the Lattice ECP3 FPGAs makes cameras based on the HDR-60 extremely low cost to build and operate.
The MN34041 Sensor NanoVesta Head Board has been designed for use on the HDR-60 Base Board as part of the HDR-60 Video Camera Development Kit. The MN34041 Sensor NanoVesta Head Board contains the camera sensor portion of the kit, while the HDR-60 Base Board contains the follow-on video camera image processing sys-tem.
The MN34041 Sensor NanoVesta Head Board comprises a compact, low cost, high dynamic range (HDR) image sensor, lens and lens housing with adjustable focus, that can bolt directly onto the Lattice HDR-60 Base Board. Both the NanoVesta and HDR-60 boards have been designed to work together as part of the Lattice HDR-60 Video Camera Development Kit. The MN34041 Sensor NanoVesta Head Board is designed to use the Panasonic MN34041PL 1/3-inch CMOS Digital Image Sensor which features:
• HD video (1092p60), 2.1 megapixels
• Full HD resolution at 12 bits and 60fps
• Full scan resolution at 10 bits and 120fps
• High sensitivity (1,580 G/LSB typical)
• LGA ceramic package
MN34041 NanoVesta攝像頭主要特性：
• Panasonic MN34041 1/3-inch CMOS Digital Image Sensor
• Lens: F/1.59, <7% distortion, with minimized flare, halo and ghosting
• Lens holder with adjustable focus
• Serial signal connections to the HDR-60 Base Board
• Selectable on-board 27.000 MHz MEMs oscillator or HDR-60 Base Board oscillator
• 3.3V, AVDD, 1.8V and 1.2V voltages are generated from the HDR-60 Base Board 5V
• Power status LEDs with one user-defined LED
圖1。MN34041 NanoVesta攝像頭外形圖
圖2。裝有MN34041 NanoVesta攝像頭的HDR-60基板
圖3。MN34041 NanoVesta攝像頭電路圖（1）
圖4。MN34041 NanoVesta攝像頭電路圖（2）
圖5。MN34041 NanoVesta攝像頭電路圖（3）
圖6。MN34041 NanoVesta攝像頭電路圖（4）
圖7。MN34041 NanoVesta攝像頭電路圖（5）
詳情請(qǐng)見(jiàn):
http://www.latticesemi.com/documents/EB71.pdf
和
http://www.latticesemi.com/documents/mn34041-nanovesta-bom.xls
