摘要: 為了滿足對于集成電路的復(fù)雜設(shè)計(jì)需求,繼承了C++擴(kuò)展庫的SystemC的開發(fā)與設(shè)計(jì)應(yīng)運(yùn)而生。SytemC可以滿足對于軟硬件協(xié)同設(shè)計(jì)的要求,在設(shè)計(jì)的過程中,可以進(jìn)行快速仿真和驗(yàn)證。針對于通信協(xié)議(ISO/IEC 18000-6C)進(jìn)行較高層次的建模設(shè)計(jì),采用函數(shù)調(diào)用的方式實(shí)現(xiàn)詢問機(jī)和標(biāo)簽之間的協(xié)議通信。針對于UHF RFID(Ultra High Frequency Radio Frequency Identification)通信協(xié)議,從系統(tǒng)級設(shè)計(jì)到行為級設(shè)計(jì),實(shí)現(xiàn)該協(xié)議的自頂向下的設(shè)計(jì),完成了標(biāo)簽識別層和基帶通信鏈路層的設(shè)計(jì)。最后采用Vivado HLS綜合軟件將SystemC源代碼轉(zhuǎn)化成Verilog等硬件描述語言,軟件描述的系統(tǒng)級綜合成RTL級代碼。針對標(biāo)簽基帶鏈路ENCODE_T模塊,在Microsoft Visual C++ 6.0中對數(shù)據(jù)“1001001001011001”進(jìn)行fm0\miller編碼仿真之后,在Modelsim中完成了波形驗(yàn)證,并通過Vivado HLS綜合軟件將其轉(zhuǎn)化為RTL級電路。
中圖分類號: TN402 文獻(xiàn)標(biāo)識碼: A DOI:10.16157/j.issn.0258-7998.201117 中文引用格式: 戚皖青,卜剛,李姝萱. 基于SystemC語言實(shí)現(xiàn)UHF RFID系統(tǒng)自頂向下設(shè)計(jì)[J].電子技術(shù)應(yīng)用,2021,47(5):45-49. 英文引用格式: Qi Wanqing,Bu Gang,Li Shuxuan. Top down design of UHF RFID tag based on SystemC[J]. Application of Electronic Technique,2021,47(5):45-49.
Top down design of UHF RFID tag based on SystemC
Qi Wanqing,Bu Gang,Li Shuxuan
School of Electronic Information Engineering,Nanjing University of Aeronautics and Astronautics,Nanjing 211106,China
Abstract: With the development of science and technology, the design of integrated circuit becomes more and more complex.In the design process, the division of hardware and software also produces more choices. In order to meet the complex design requirements for integrated circuits, the development and design of SystemC, which inherits the C + + extension library, came into being. SytemC can meet the requirements of hardware and software codesign, and can be quickly simulated and verified in the design process. In this paper, the communication protocol(ISO/IEC 18000-6C) is modeled and designed at a higher level. The protocol communication between interrogator and tag is realized by function call. For UHF RFID(Ultra High Frequency Radio Frequency Identification)communication protocol, from system level design to behavior level design, the top-down design of the protocol is realized, and the design of tag identification layer and baseband communication link layer is completed. Finally, the source code of this systemc is transformed into Verilog and other hardware description languages by using Vivado HLS synthesis software, and the software description of system level is synthesized into RTL code. This paper focuses on label baseband link encode_T module, after FM0 / Miller coding simulation of data "1001001001011001" in Microsoft Visual C++ 6.0, the waveform verification is completed in Modelsim, and it is transformed into RTL level circuit by Vivado HLS integrated software.
Key words : software and hardware;collaborative design;high level;protocol communication;top-down
0 引言
隨著科技的發(fā)展,集成電路的規(guī)模變得龐大和復(fù)雜,電子系統(tǒng)設(shè)計(jì)(Electronic System Level,ESL)流程是目前最先進(jìn)片上系統(tǒng)設(shè)計(jì)流程方法。