3.3 V/0.18 μm恒跨導(dǎo)軌對(duì)軌CMOS運(yùn)算放大器的設(shè)計(jì)
來源:電子技術(shù)應(yīng)用2012年第11期
馬玉杰,高俊麗,后永奇,耿曉勇,楊建紅
蘭州大學(xué) 物理科學(xué)與技術(shù)學(xué)院 微電子研究所,甘肅 蘭州730000
摘要: 基于0.18 μm CMOS工藝,設(shè)計(jì)了一種3.3 V低壓軌對(duì)軌(Rail-to-Rail)運(yùn)算放大器。該運(yùn)算放大器的輸入級(jí)采用3倍電流鏡控制的互補(bǔ)差分對(duì)結(jié)構(gòu),實(shí)現(xiàn)了滿電源幅度的輸入輸出和恒輸入跨導(dǎo);輸出級(jí)采用前饋式AB類輸出控制電路,保證了軌對(duì)軌的輸出擺幅以及較強(qiáng)的驅(qū)動(dòng)能力。仿真結(jié)果表明,直流開環(huán)增益為120 dB,單位增益帶寬為5.98 MHz,相位裕度為66°,功耗為0.18 mW,在整個(gè)共模范圍內(nèi)輸入級(jí)跨導(dǎo)變化率為2.45%。
中圖分類號(hào): TN722
文獻(xiàn)標(biāo)識(shí)碼: A
文章編號(hào): 0258-7998(2012)11-0048-03
文獻(xiàn)標(biāo)識(shí)碼: A
文章編號(hào): 0258-7998(2012)11-0048-03
Design of a 3.3 V/0.18 μm constant-gm Rail-to-Rail CMOS operational amplifier
Ma Yujie,Gao Junli,Hou Yongqi,Geng Xiaoyong,Yang Jianhong
Institute of Microelectronics, School of Physical Science & Technology, Lanzhou University, Lanzhou 730000,China
Abstract: A Rail-to-Rail operational amplifier is designed with 0.18 ?滋m CMOS technology at 3.3 V single power supply. Its input stage is a complementary differential pair controlled by three-times current mirror to realize Rail-to-Rail common mode input range and constant trans-conductance,while the output stage employs a feed-forward biased class-AB control circuit, which ensures Rail-to-Rail output swing and strong driving capability. The simulation results indicate that the operational amplifier has achieved open loop DC gain of 120 dB, unit gain bandwidth of 5.98 MHz, phase margin of 66 degree, power dissipation of 0.18 mW, and the trans-conductance variation over the common-mode input range of only about 2.45%.
Key words : operational amplifier;low voltage;constant trans-conductance;Rail-to-Rail
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