Atmel公司的RZRAVEN是AT86RF230 2.4GHz無線收發(fā)器和AVR微控制器的開發(fā)套件,是開發(fā)和調(diào)試各種RF應(yīng)用的專業(yè)平臺,通過LCD和音頻輸入和輸出提供良好大案人工接口,適合于IEEE 802.15.4™, ZigBee®, 6LoWPAN, RF4CE, SP100, WirelessHART™ 和 ISM應(yīng)用以及無線傳感器網(wǎng)絡(luò),消費類電子,工業(yè)控制和PC外設(shè).本文介紹了AT86RF230主要特性,框圖,應(yīng)用電路圖以及開發(fā)套件RZRAVEN主要特性,AVRRAVEN框圖,電路圖和材料清單,PCB元件布局圖與RZUSBSTICK框圖,電路圖和材料清單,PCB元件布局圖.

The AT86RF230 is a low-power 2.4 GHz radio transceiver especially designed for ZigBee/IEEE 802.15.4 applications. The AT86RF230 is a true SPI-to-antenna solution. All RF-critical components except the antenna, crystal and de-coupling capacitors are integrated on-chip. Therefore, the AT86RF230 is particularly suitable for applications like:

• 2.4 GHz IEEE 802.15.4 and ZigBee systems

• 6LoWPAN and RF4CE systems

• Wireless sensor networks

• Industrial control, sensing and automation (SP100, WirelessHART)

• Home and building automation

• Consumer electronics

• PC peripherals

The AT86RF230 can be operated by using an external microcontroller like ATMEL’s AVR microcontrollers. A comprehensive software programming description can be found in the application note AVR2009 “AT86RF230 – Software Programming Model”.

This single-chip radio transceiver provides a complete radio transceiver interface between the antenna and the microcontroller. It comprises the analog radio transceiver and the digital demodulation including time and frequency synchronization, and data buffering. The number of external components is minimized such that only an antenna, a crystal and four decoupling capacitors are required. The bidirectional differential antenna pins are used for transmission and reception, so that no external antenna switch is needed.

The received RF signal at pins RFN and RFP is differentially fed through the low-noise amplifier (LNA) to the RF filter (PPF) to generate a complex signal. This signal is converted down by mixers to an intermediate frequency and fed to the integrated channel filter (SSBF). The limiting amplifier provides sufficient gain to drive the succeeding analog-to-digital converter (ADC) and generates a digital RSSI signal with 3 dB granularity. The ADC output signal is sampled by the digital base band receiver (RX BBP).

The transmit modulation scheme is offset-QPSK (O-QPSK) with half-sine pulse shaping and 32-length block coding (spreading) according to [1]. The modulation signal is generated in the digital transmitter (TX BBP) and applied to the fractional-N frequency synthesis (PLL) generating a coherent phase modulation required for demodulation of O-QPSK signals. The frequency-modulated RF signal is fed to the power amplifier (PA).An internal 128 byte RAM for RX and TX (Frame Buffer) buffers the data to be transmitted or the received data. Two on chip low dropout (LDO) voltage regulators provide the internal analog and digital 1.8V supply.

AT86RF230主要特性:

• High Performance RF-CMOS 2.4 GHz Radio Transceiver Targeted for IEEE 802.15.4™, ZigBee®, 6LoWPAN, RF4CE, SP100, WirelessHART™ and ISM Applications

• Industry Leading Link Budget (104 dB):

- Programmable Output Power from -17 dBm up to 3 dBm

- Receiver Sensitivity -101 dBm

• Ultra-Low Power Consumption:

- SLEEP: 20 nA

- RX: 15.5 mA

- TX: 16.5 mA (at max Transmit Power of 3 dBm)

• Ultra-Low Supply Voltage (1.8V to 3.6V) with Internal Regulator

• Optimized for Low BoM Cost and Ease of Production:

- Few External Components Necessary (Crystal, Capacitors and Antenna)

• Excellent ESD Robustness

• Easy to Use Interface:

- Registers and Frame Buffer Accessible through Fast SPI

- Only Two Microcontroller GPIO Lines Necessary

- One Interrupt Pin from Radio Transceiver

- Clock Output with Prescaler from Radio Transceiver

• Radio Transceiver Features:

- 128-byte SRAM for Data Buffering

- Programmable Clock Output to Clock the Host Microcontroller or as Timer Reference

- Integrated TX/RX Switch

- Fully Integrated PLL with on-chip Loop Filter

- Fast PLL Settling Time

- Battery Monitor

- Fast Power-Up Time < 1 ms

• Special IEEE 802.15.4-2003 Hardware Support:

- FCS Computation

- Clear Channel Assessment

- Energy Detection / RSSI Computation

- Automatic CSMA-CA

- Automatic Frame Retransmission

- Automatic Frame Acknowledgement

- Automatic Address Filtering

• Industrial Temperature Range:

- -40° C to 85° C

• I/O and Packages:

- 32-pin Low-Profile QFN

- RoHS/Fully Green

• Compliant to EN 300 328/440, FCC-CFR-47 Part 15, ARIB STD-66, RSS-210

• Compliant to IEEE 802.15.4-2003

圖1.AT86RF230方框圖

圖2.AT86RF230應(yīng)用電路圖

AT86RF230開發(fā)套件RZRAVEN

The Atmel RZRAVEN is a development kit for the AT86RF230 radio transceiver and the AVR microcontroller. It serves as a versatile and professional platform for developing and debugging a wide range of RF applications; spanning from: simple point-to-point communication through full blown sensor networks with numerous nodes running complex communication stacks. On top of this, the kit provides a nice human interface, which spans from PC connectivity, through LCD and audio input and output.

開發(fā)套件RZRAVEN主要特性:

• Development kit for the Atmel® AT86RF230 radio transceiver and Atmel AVR®
Microcontroller

• CE, ETSI and FCC approved

• LCD module (Atmel AVRRAVEN):

• AT86RF230 radio transceiver with high gain PCB antenna

• Dual AVR microcontrollers

• Dynamic speaker and microphone

• Atmel Serial Dataflash®

• User I/O section:

• USART

• GPIO

• Relay Driver

• Powered by battery or external supply:

• 5V to 12V external supply

• USB module (Atmel RZUSBSTICK):

• AT86RF230 radio transceiver with miniature PCB antenna

• AVR microcontroller with integrated Full Speed USB interface

• External memory interface

圖3.開發(fā)套件RZRAVEN外形圖

圖4.AVRRAVEN框圖

圖5.AVRRAVEN元件布局圖(頂層)

圖6.AVRRAVEN元件布局圖(底層)

圖7.Atmel AVRRAVEN電路圖(1)

圖8.Atmel AVRRAVEN電路圖(2)

圖9.Atmel AVRRAVEN電路圖(3)

圖10.Atmel AVRRAVEN電路圖(4)

圖11.Atmel AVRRAVEN電路圖(5)
Atmel AVRRAVEN材料清單:



圖12.RZUSBSTICK框圖

圖13. Atmel RZUSBSTICK電路圖
Atmel RZUSBSTICK 材料清單:


圖14.Atmel RZUSBSTICK元件布局圖(頂層)

圖15.Atmel RZUSBSTICK元件布局圖(底層)
詳情請見:
http://www.atmel.com/Images/doc5131.pdf
和
http://www.atmel.com/Images/doc8117.pdf